Once the ASIC is unlocked, we get access to a new [[Gate Array]] register called RMR2. It is accessible in the same way as other Gate Array registers.
Locking the ASIC again doesn't disable any of its functionality, it just prevents you changing it. [https://www.cpcwiki.eu/forum/programming/asm-source-code/msg249856/#msg249856 Source]
<br>
== [[Madram]] version ==
In Z80 Assembler:It still uses some magic numbers.
<pre>
UnlockAsic
di
ld bc,#BCFF
ld hl,%1001000011101010
.loop:
out (c),c
ld a,h:rlca:ld h,l:ld l,a
ld c,a
cp #4D
jr nz,.loop
ld a,#CD ; a=#CD for unlock, another value for lock
out (c),a:out (c),a
ei
</pre>
In Python:<pre>def unlock_asic(): b, c, h, l = 0xBC, 0xFF, 0x90, 0xEA # Initialize registers port_out(b, c) port_out(b, 0)= [[Urusergi]] version ==
while c != 0x4D: port_out(b, c) h, l = l, ((h << 1) | (h >> 7)) & 0xFF # Rotate h and swap h,l c = ((c >> 1) & ~(1 << 3)) | (l & 0x88) # Modify cNo magic numbers here.
port_out(b, 0xCD)
port_out(b, 0xCD)
def port_out(port, value):
print(f"Port: {hex(port)}xx Out: {hex(value)}")
unlock_asic()
</pre>
== [[Urusergi]] version ==
In Z80 Assembler:
<pre>
di ; v3.1 -> 30 bytes!
ld bc,#BCFF
out (c),c
out (c),0 ; db #ED,#71
ld a,c
.loop:
out (c),a
ld dh,a ; D h = 7654 3210rlca:rlca add hl,hl ; h = 6543 210*rra ; a = 7765 4321add hl,hl ; A h = 5432 107610**xor dh:and #7FF7:xor d h ; A a = 7432 10767765 1321ld el,arlca ; A l = 4321 07677765 1321xor e ld a,h ; A a = 7432 1076 XOR 4321 07675432 10**rrc d rla ; D a = 0765 43210***xor d:and #88:xor d l ; A a = (7 xor 4)765 (1 xor 0)321
cp c
jr nz,.loop
ei
</pre>
In Python:== Algorithm ==
<pre>
def unlock_asic():
b, c = 0xBC, 0xFF
port_outout(b, c) port_outout(b, 0)
a = c
while True:
port_outout(b, a) d # a = a(7 xor 4)765 (1 xor 0)321 a = (a << 2 | (a >> 61) & 0xFF a = 0x77) | ((a ^ d(a << 3)) & 0x7F0x80) ^ d a = | (((a << 1 | a >> 72) ^ (a d = (d >> 1 | d << 73) & 0xFF a = ((a ^ d) & 0x880x08) ^ d
if a == c: break
def port_outout(port, value): print(f"Port: {hex(port)}xx Out: {hex(value)}")
unlock_asic()
= Patent =
For one reason or another, Amstrad has patented the verification mechanism ([[Media:Patent GB2243701A.pdf|GB2243701A]]). The patent seems to focus on ''verifying'' (rather than on ''sending'') the sequence, so its legal use is a bit unclear.
On the [[Original Arnold V Specs]] - Issue 1.5 - 10th April 1990, it is precised at §2.11 "Locking of enhanced features":
</code>
According to [https://patents.google.com/patent/GB2243701A/en Google patents for GB2243701A] the patent was withdrawn on 1994-12-21. This means that this particular patent cannot be enforced.
<br>
[[Category:Programming]]
[[Category:CPC Plus]]