*12-bit colour palette
*Hardware 16 hardware sprites
*Vertical and horizontal per-pixel hardware soft scrolling (in complement with register 12&13 of the CRTC)
*Screen splitting
*Programmable raster interrupts
*Vectored interrupts
*3 DMA sound channels
*Specific ROM switching
*8-bit printer port (with bit3 of CRTC register 12)
Each sprite magnification is coded in 1 byte:
* bits7..3 4 are ignored
* bits3..2 are X magnification (00 = not displayed, 01 = x1, 10 = x2, 11 = x4)
* bits1..0 are Y magnification (00 = not displayed, 01 = x1, 10 = x2, 11 = x4)
Sprites will be displayed at coordinates based on the internal counters of the CRTC. Sprite X coordinate is based on HCC. Sprite Y coordinate is based on VCC and VLC.
When the data for a sprite is read or written, that sprite is removed from the display for the duration of the access. Thus sprite data should only be accessed during retraced time or while the raster is scanning somewhere else, otherwise there is a risk of disruption of the display. [[Original Arnold V Specs|Source]]
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== Soft scroll ==
The SSCR register (at address 6804h) controls soft (ie. meaning smooth, not software) scrolling by pixels rather than by characters. Setting this register to 0 (the default value at power-up) disables the soft scroll feature. The soft scrolling mechanism affects the entire main screen, regardless of the split screen feature, but does not affect sprites.
* Bits3..0 of SSCR define a horizontal delay between 0 and 15 high-resolution (mode 2) pixels, shifting the screen image to the right by the programmed value. This causes pixels to be lost behind the right border and random data to appear on the left. Also the programmer must ensure that the delay value is a multiple of the number of bits per pixel.
* Bits6..4 of SSCR are summed to the least significant 3 bits of the scan line address, determining which of the eight 2k blocks contains the data for the first scan line on the screen. This shifts the display up by the programmed number of scan lines, causing the first lines to be lost and extra lines to appear at the bottom.
== Programmable raster interrupt ==
The PRI register (at address 6800h) specifies the scan raster line where the interrupt occurs. The interrupt will occur at the end of that scan line. The raster interrupt will start exactly 10us following 10µs after the HSYNC starton that raster line. Unlike the R52 raster interrupt system, it is not dependant on the width of the HSYNC.
Setting the PRI register to 0 (the default value at power-up) reverts to the classic [[Gate Array]] R52 raster interrupt system instead.
|A7..A3||ASIC||IVR register bits7..3
|-
|A2..A1||ASIC||00 = DMA chan 2, chan2 ; 01 = DMA chan 1, chan1 ; 10 = DMA chan 0, chan0 ; 11 = Raster
|-
|A0||ASIC||Always 0
The Amstrad Plus ASIC improved a lot of the old CPC's capability.
Yet this was a bit flawed.
*Despite removing some tasks from the CPU ([[Z80]]), ASIC registers are mapped onto memory from #4000 to #7FFF range prior to other type of memory (RAM or ROM). That means this memory range is not accessible when ASIC registers are paged.
*PPI emulation is not correct as the original 8255 does not need validation. On ASIC emulation, this validation is needed so some programs written for "old CPCs" will not be able to get keyboard state.
*Reducing horizontal blanking could cause another internal conflict when using DMA lists. In the worst case, this conflict can cause irreversible damage to the ASIC.
*Original CPC colors emulation is not correctcolours are slightly different.
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POR column indicates whether a register has power-on reset. A "N" indicates that the contents of a register are undefined at power-on.
Writes to unused areas of the ASIC I/O page are not persisted. [https://www.cpcwiki.eu/forum/games/harrier-attack-reloaded/msg247703/#msg247703 Source]
Beware, when booting your software from cartridge. Z80 is in Interrupt Mode 0 by default. Stack Pointer is uninitialized. FDC is in DMA mode by default. And hardware sprites memory has random value.
Anyway, you have to initialize all internal components when you are booting from cartridge.
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==Related pages==
*[[Arnold V specs]]*[[Original Arnold V Specs Revised]]
*[[Extra CPC Plus Hardware Information]]
*[https://www.cpcwiki.eu/index.php/Amstrad_Cartridge_Identification_Device ACID] Protection chip used in the cartridges of the Plus series and the GX4000 game console
*[[Programming:Unlocking ASIC]]
*[[B-ASIC]]