The 6845 '''CRTC''' (Cathode Ray Tube Controller) chip was created by Motorola in 1977. It works with the [[Gate Array]] to generate the video signal on the Amstrad CPC.
This chip is also used in the [[BBC Micro]], Camputers [[Lynx]], [[Sharp X1]], [[EACA Colour Genie]], [[MicroBee]], [[Commodore PET]] and the early graphics cards (MDA, Hercules, CGA, Plantronics Colorplus) for [[IBM PC]]. And it is found in some [https://www.msx.org/wiki/Hitachi_HD6845 MSX1 expansions], providing an 80-column text mode. It's important to note that the CRTC chip is primarily designed for character-based displays. It explains why, on the Amstrad CPC, the video memory is organized into a grid of characters rather than a purely linear bitmap.
NOTES:
The start address can be manipulated to achieve horizontal and/or vertical hardware scrolling:
*To move right: <code>start_address := start_address + 1</code>*To move left: <code>start_address := start_address - 1</code>*To move down: <code>start_address := start_address + R1</code>*To move up: <code>start_address := start_address - R1</code>
However, it is a position in word (16 bits), not in byte. So, the screen will move two bytes at a time horizontally. Also, the precision will be one CRTC character vertically.
The first game that used R12/R13 for both horizontal and vertical hardware scrolling is [https://www.cpc-power.com/index.php?page=detail&num=1839 Roland on the Ropes] , released in 1984.
To achieve smoother hardware scrolling, other tricks are required in complement to R12/R13. Usually, R3 is used for smooth horizontal scroll and R5 for smooth vertical scroll.
A good example of smooth hardware multidirectional scrolling game on CPC is [https://www.cpc-power.com/index.php?page=detail&num=2119 Super Cauldron], released in 1993.
Everything you need to know about hardware scrolling on CPC can be found [https://www.cpcwiki.eu/forum/programming/hardware-scrolling-21687/ there].
<br>
== Split screen (aka Rupture) ==
While there is usually 1 CRTC frame per screen frame, the screen frame can be divided into multiple CRTC frames of varying proportions.
Total height of all splits must be 39.
The [https://www.cpcwiki.eu/forum/programming/interrupt-positions-with-various-sized-screens/ IntPos tool] by Kevin Thacker can help visualize the potential split screen areas.
Note: If all you want is multiple graphics modes in the same frame, you don't need to touch the CRTC at all. More information here: [https://www.cpc-power.com/cpcarchives/index.php?page=articles&num=184 Multi-Mode Graphique (FR)]
<br>
CRTC pin CUDISP is not connected to the Gate Array, so it has no effect on a barebone CPC or Plus machine.
However, this signal is provided to the expansion [[Connector:Expansion port]]. And it is used by the [[PlayCity]] and [[Play2CPC]] expansions.
<br>
== Interlace modes ==
Note: A lot of Some details about the CRTC interlace implementations are missing in this article. Consider it as an introduction to the topic.
[[File:CRTC Interlace modes.png]]
|}
On CRTCs 0/<br> === Screen size === We can calculate the screen size in words by multiplying R1 x R6 x (R9+1/). And then multiplying the result by 2to have the screen size in bytes. With the default CRTC values, if a Write Only register is read from, "0" is returnedwe obtain 40 x 25 x (7+1) x 2 = 16000 bytes. The register accessing scheme So we can observe that only part of the 16384 bytes (=16KB) page of VRAM is actually displayed on CRTCs 3/4 makes it impossible to happenscreen.
<br>
=== Register access ===
On CRTCs 0/1/2, if a Write Only register is read from, "0" is returned. The register accessing scheme on CRTCs 3/4 makes it impossible to happen.
On all CRTCs, only the 5 least significant bits of the selected register number are considered to write to a register. The other bits are ignored.
== CRTC register differences ==
CRTC types 3 and 4 are identical in every way, except for the unlocking mechanism, split screen, hardware soft scroll and 8-bit printer port functionalities specific to the [[ASIC]].
<br>
|MA
|
|R14/R15
|This counter is exposed on CRTC pins MA0..MA13
|}
This chip was never used by Amstrad. However, some CPC enthusiasts have replaced the original CRTC chip in their CPC with this one.
With this chip, split-screen becomes easy: [https://thecheshirec.at/2024/05/20/des-splitscreens-en-basic-sur-crtc5/ Split-screen in BASIC]. And 3 new graphics modes (160x100x16160x100x16c, 320x100x4320x100x4c, 640x100x2640x100x2c) are available: [https://thecheshirec.at/2024/11/10/trois-nouveaux-modes-video-grace-au-crtc-5/ New graphics modes in BASIC].
This is the cheapest way to upgrade the CPC's graphics capabilities, costing only 1.29€. [https://thecheshirec.at/2024/05/19/des-crtc5-a-129e/ Source]
* [[Media:ACCC1.8-EN.pdf]] [[Media:ACCC1.8-FR.pdf]] CPC CRTC Compendium - Latest (04/2024!) document containing in-depth info about CRTC programming on CPC.
* [[Media:CRTC Compendium Podcast.mp3]] The CRTC Compendium digested in podcast format
* [https://martin.hinner.info/vga/pal.html PAL video timing specification]
<br>