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CRTC

4 bytes removed, Sunday at 03:46
/* VSYNC */
As an exception, on CRTCs 3/4, if R7=0 then mid-VSYNC will instead occur on the odd field.
=== Subpixel hardware scrolling vertical scroll ===
By tuning very precisely when the VSYNC signal is sent to the monitor, Longshot demonstrated [https://youtu.be/y1o1Gk-6gGE hardware vertical screen scrollingscroll] with a precision of 1/64th of a pixel.
=== PPI VSYNC ===
8,298
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