Changes
6502
,/* IRQ / NMI / BRK / RESET */
The priority sequence for interrupts, from top priority to bottom, is as follows: RESET, BRK, NMI, IRQ. [https://www.westerndesigncenter.com/wdc/documentation/w65c816s.pdf Source at chapter 7.19]
On NMOS, if NMI or IRQ that happens is asserted during specific moments the first 4 ticks of a BRK execution can cause instruction, the BRK to instruction will execute normally at first (PC increments will occur and the status word will be effectively skippedpushed with the BF flag set), but execution will branch to the NMI vector instead of the IRQ/BRK vector. On CMOS, this situation is correctly handled by executing BRK and then servicing the interrupt.
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