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CRTC

10 bytes added, 11 July
/* HSYNC */
=== HSYNC ===
The HSYNC width value is interpreted differently between CRTCs. On CRTCs 0/1, if 0 is programmed then no HSYNC is generated (and therefore, no interrupts). On CRTCs 2/3/4, if 0 is programmed then this gives an HSYNC width of 16.
==== Signal delay ====
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