Changes

Jump to: navigation, search

Default I/O Port Summary

135 bytes added, 5 July
/* Memory Mapped I/O Ports */
| 4F00h || 100h || N || R/W || || Sprite 15 image data
|-
| style="background:#efefef;" colspan="6"|''Block unused''
|-
| 6000h || 2 || N || R/W || X0 || Sprite 0 X position
| 607Dh || 3 || || || || (unused)
|-
| style="background:#efefef;" colspan="6"|''Block unused''
|-
| 6400h || 2 || N || R/W || || Colour palette, pen 0
| 643Eh || 2 || N || R/W || || Colour palette, sprite colour 15
|-
| style="background:#efefef;" colspan="6"|''Block unused''
|-
| 6800h || 1 || Y || W || PRI || Programmable raster interrupt scan line
| 680Fh || 1 || || R || ADC7 || Analogue input channel 7
|-
| style="background:#efefef;" colspan="6"|''Block unused''
|-
| 6C00h || 2 || N || W || SAR0 || "DMA" channel 0 address pointer
| 6C0Fh || 1 || Y || R/W || DCSR || "DMA" control/status register
|-
| style="background:#efefef;" colspan="6"|''Block unused''
|}
8,337
edits