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PSG

730 bytes added, 9 June
/* D/A converter table */
The Programmable Sound Generator (PSG) of the CPC is an AY-3-8912 chip. It is able to output three separate sound channels (named Channel A, B and C). Each channel can be used to output tones and/or white noise. == Clock Frequency == The PSG is driven by an external clock at 1MHz provided by the [[Gate Array]]. The AY chip has an internal clock divider by 8 which means that it works internally at 125KHz, outputting 125,000 samples per second for each channel.
== PSG Registers ==
== Noise Generator ==
The noise generator uses a [https://en.wikipedia.org/wiki/Linear-feedback_shift_register Linear -Feedback Shift Register] algorithm. According to the [https://github.com/mamedev/mame/blob/master/src/devices/sound/ay8910.h MAME developers], the Random Number Generator of the 8910 is a 17-bit shift register. The input to the shift register is bit0 XOR bit3. Bit0 is the output. This was verified on AY-3-8910 and YM2149 chips.
== D/A converter table ==
0, 231, 695, 1158, 2084, 2779, 4168, 6716, 8105, 13200, 18294, 24315, 32189, 40757, 52799, 65535
 
For the record, these are [https://groups.google.com/g/comp.sys.sinclair/c/-zCR2kxMryY Matthew (Gasman) Westcott measurements] (normalised) on its ZX Spectrum:
 
0, 0.0105, 0.0154, 0.0216, 0.0314, 0.0461, 0.0635, 0.1061, 0.1319, 0.2163, 0.2973, 0.3908, 0.5129, 0.6371, 0.8186, 1
ay3 manual show different values:
== Block Diagram ==
*[[File:PSG Block Diagram.png]]
 
== Schematics ==
 
The PSG is driven by an external clock at 1MHz provided by the [[Gate Array]].
The AY chip has an internal clock divider by 8 which means that it works internally at 125KHz, outputting 125,000 samples per second for each channel.
 
The BC2 and A8 pins are always equal to 1 as they are connected to +5V.
The /A9 pin is non-existent on the AY-3-8912 model.
== Datasheet ==
5,395
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