Difference between revisions of "Aleste 520EX"

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[[Image:Aleste.jpg|thumb|right|Aleste 520EX - a CPC clone housed in a case with MSX keyboard]]
 
[[Image:Aleste.jpg|thumb|right|Aleste 520EX - a CPC clone housed in a case with MSX keyboard]]
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The '''Aleste 520EX''' is a [[Clones|clone]] of the Amstrad CPC 6128 developed 1993 Patisonic in  Omsk (Siberia). The Aleste is rare, according to Patisonic themselves, they ''"produced several dozens of the model, some of them was in 'kit' form"''.
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The '''Aleste 520EX''' is a [[Clones|clone]] of the Amstrad CPC 6128 developed 1993 by [[Patisonic]] in  Omsk (Siberia). The Aleste is rare, according to Patisonic themselves, they ''"produced several dozens of the model, some of them were in 'kit' form"''.
  
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Additionally to the standard CPC6128 features, it includes a number of extra features: '''64-color''' palette, '''double color depth''' (eg. 16 color at high 320x200 resolution), battery-backed '''Real Time Clock''' chip, '''512Kbyte RAM''' (of which 192K can be accessed as on 64K CPC with 128K dk'tronics memory expansion), '''8bit printer''' port, expanded keyboard matrix with '''10 additional keys''', two software controlled '''LEDs''', extended Expansion Port (with additional pins for '''DMA support''').
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In addition to the standard CPC6128 features, it includes a number of extra features: '''64-color''' palette, '''double color depth''' in slightly '''decreased horizontal resolution''' mode (eg. 16 color at 256x200 resolution), battery-backed '''Real Time Clock''' chip, '''512Kbyte RAM''' (of which 192K can be accessed as on 64K CPC with 128K dk'tronics memory expansion), '''8bit printer''' port, expanded keyboard matrix with '''10 additional keys''', two software controlled '''LEDs''', extended Expansion Port (with additional pins for '''DMA support''').
  
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The computer works with Amstrad [[CP/M]] and MSXDOS as well (note: MSXDOS is a CP/M clone, which uses a FAT filesystem, as used on MSX and MS-DOS computers, instead of the normal CP/M filesystem).
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== Technical ==
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==Amstrad Mode==
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Differences:
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* [[Aleste 520EX - I/O Ports]] - I/O Ports, Memory, etc.
 +
* [[Aleste 520EX - Schematics]] - Schematics, Chipset, etc.
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* [[Aleste 520EX - Expansions]] - Hardware Expansions, External Connectors, etc.
 +
* [[Aleste 520EX - Software]] - CPC software, CP/M, MSXDOS, and games ported to Aleste
 +
* [[Aleste 520EX - Misc]] - Unsorted Notes
  
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- Interrupts can't be manually cleared. This was possible on the CPC by writing to the Gate Array with data bit 7 set 1, bit 6 set to 0 and bit 4 set to 1. In the Aleste this bit is controls an LED.
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== Pictures ==
  
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- Decoding of it's equivalent of the Gate-Array is based on A15 only.
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<gallery caption="Aleste 520EX">
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File:ALESTE_520EX_PCB_Top.jpg|PCB Top
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- The Aleste uses a patched CPC6128 Operating System ROM. It is patched to use the Aleste's 8-bit printer port and has a different startup message.
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File:ALESTE_520EX_PCB_Bottom.jpg|PCB Bottom
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File:ALESTE_Keyboard.jpg|Keyboard
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==Special Mode==
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</gallery>
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At this mode computer have different memory manager. The manager seems same like MSX mapper and could swicth ON any 16KB page of whole memroy at the any of 16KB page of CPU memory.
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The mode have different color coding system. It has the color lookup table (CLUT) or another name pallette. That is dual port memory one prot for coversion pixel's color number to RGB levels. But second for CPU acccess. There is 2 bits for each channel at the pallette present, then it lets to have 64 colors.
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The mode have two additional modes with 32KB of video memory. Pixel encoding the same as at Amstrad mode but each line has twice more bytes (and pixels). Two 16KB pages transfer to output, one buffer for odd and second even lines of screen.
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The computer have also mc146818 compatible RTC and a 8251 compatible serial. A serial mouse can be used.
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The 8253 timer is used to generate transmit and receive clock for serial. In addition the CURSOR output of the CRTC is connected as a trigger which is then connected to the colour hardware. So the CRTC cursor can be used to switch colours by the hardware.
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Aleste ROM is 64KB:
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* page 0 is modified Amstrad CPC6128 OS ROM
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* page 1 is Amstrad BASIC
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* page 2 is AMSDOS (Amstrad DOS)
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* page 3 is Boot Rom, BIOS Setup, MSXDOS boot loader
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The BIOS SETUP lets control over: date and time, boot drive, RAM disk, screen mode and style, printer, serial port, and mouse.
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At the boot time computer loads BIOS and MSXBDOS (BIOS for Disc BIOS) from a bood disc. After that COMMAND.COM (MSXDOS). Computer can bott from RAM disc as well. Computer go to AMSTRAD mode when "Shift" is pressed while reset.
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== Hardware Expansions ==
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Most pins on the expansion port are the same as on CPC, so most CPC expansions should work on the Aleste (with a 62pin to 50pin adaptor).
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Additional Aleste specific expansions are:
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=== External Disc Drive ===
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The Aleste contains a disk controller, so no external disc interface is required. The floppy connector is the same as the "Drive B Connector" on CPC, the only difference is that outputs select signals for two drives (A and B).
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The 'official' Aleste drive is 3.5", 720K, 80 tracks. It does also contain the power supply for the computer (which must be connected via whatever separate cable).
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=== Magic Sound Expansion Board ===
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MagicSound is a four channel DMA playback device. Supports 8 bit per sample, 6 bits of volume per channel, and 16bit samplerate timer per channel. Computer uses the board for playing STM (Scream Tracker) files. For details, see:
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* [[Magic Sound Board]]
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=== Foton Expansion Board ===
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Another additional board FOTON is a "Light Processor". The board have D54 interface and Aleste with special FX application controls over club's light. (In english: it could be named "Photon Disco Light Controller")
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=== 2MB RAM Expansion ===
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The Aleste is said to be expandable to 2MB RAM. Whether or not (and how) this is possible is unclear. There seem to be no provisions for that on the mainboard. The register file (chip number D88) could actually store two additional bank bits. But the I/O port (port 7FFFh with Bit6-7=high) has only ONE spare bit (bit5), so, with that I/O port, only 1MB would be possible, not 2MB.
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=== Turbo Mode Upgrade ===
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Runs the CPU at faster speed. Intended for programs that require a lot of CPU load, like compilers, or ported MSX games (which need to draw the MSX video display processors (VDP) hardware sprites by software).
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* The Turbo Mode schematic is unknown
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* Turbo Mode is said to be incompatible with AMSDOS disk access for timing reasons (ie. works only with MSXDOS or so) (not sure if that's a bios/software related problem - it might also be caused by video resolution (which changes CPU and DOT clocks): working in 256/512 pix modes, but not in amstrad-style 160/320/640 pix modes)
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== VDP Emulator aka GameBIOS ==
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It is not clear exactly what this is.
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It seems to describe a collection of software functions (BIOS or library) which aids with converting MSX or MSX2 games to the Aleste.
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Certainly the games that have been converted to Aleste are patched, and it seems they do not access any special I/O ports.
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It doesn't appear to be an emulator as such, and it seems the Aleste should be modified to run at 8Mhz to run the games at sufficient speed.
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Computer have "GameBios" with is emulator of VDP9938. it was sufficiently - to replace the first several kilos-byte of game and MSX2 game worked. Certainly, video processor MSX is by apparatus sharpened for the games, but they worked sufficiently rapidly to 8MGts of game on "alesta" in order in them to play. Game "FireBird" typical
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"vertical scroller" worked very well.
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== Pictures ==
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<gallery caption="Pictures from http://aleste520.narod.ru">
 
<gallery caption="Pictures from http://aleste520.narod.ru">
Line 105: Line 40:
 
This version has 7pin+7pin sockets for printer (normal would be 5pin+7pin, though the extra pins are most probably left unused).
 
This version has 7pin+7pin sockets for printer (normal would be 5pin+7pin, though the extra pins are most probably left unused).
  
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== Schematics (edited, with corresponding western part numbers) ==
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<gallery caption="Magic Sound board">
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File:ALESTE_MagicSound_PCB_Top.jpg|PCB Top
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<gallery>
+
File:ALESTE_MagicSound_PCB_Bottom.jpg|PCB Bottom
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File:Aleste-Schematic1.gif|Schematic 1/4
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File:Aleste-Schematic2.gif|Schematic 2/4
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File:Aleste-Schematic3.gif|Schematic 3/4
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File:Aleste-Schematic4.gif|Schematic 4/4
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File:Aleste-Component-Map.gif|Component Map
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</gallery>
 
</gallery>
  
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For reference, the original '''unedited''' schematics are here:
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A sound card for the Aleste.
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[[Media:Black-Aleste-Schematic1.gif|Sheet 1]],
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[[Media:Black-Aleste-Schematic2.gif|Sheet 2]],
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[[Media:Black-Aleste-Schematic3.gif|Sheet 3]],
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[[Media:Black-Aleste-Schematic4.gif|Sheet 4]], and
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[[Media:Black-Aleste-Component-Map.gif|Component Map]]
+
  
 
== Documents ==
 
== Documents ==
  
 
* [[Media:Aleste-Programming-Manual-English.txt]] - original programming manual (english version, ported to ASCII format)
 
* [[Media:Aleste-Programming-Manual-English.txt]] - original programming manual (english version, ported to ASCII format)
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* [[Media:AlesteStartupManual.txt]] - info on building the computer, fixing bugs on the PCB (translated to english)
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== I/O Map (Overview) ==
+
* [[Media:AlesteSchematicDescription.txt]] - description of schematics (translated to english)
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* [[Media:AlesteUserManual.txt]] - includes external pin-out; some of them conflict with schematics (translated to english)
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* [[Media:AlesteBiosDisassembly.txt]] - Disassembly of differences between CPC6128 and Aleste BIOS
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{|{{Prettytable|width: 700px; font-size: 2em;}}
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* [[Media:AlesteBootmenuRomBank3.asm]] - Original source code for BOOTMENU (Upper ROM Bank 3)
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|'''I/O'''||'''Decoded as'''||'''Port'''||'''Read'''||'''Write'''
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|-
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|#7CXX||%0xxxxx00 xxxxxxxx||Aleste RAM Mapper page 0 (extended "Gate Array 3")||Read||Write
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|-
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|#7DXX||%0xxxxx01 xxxxxxxx||Aleste RAM Mapper page 1 (extended "Gate Array 3")||Read||Write
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|-
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|#7EXX||%0xxxxx10 xxxxxxxx||Aleste RAM Mapper page 2 (extended "Gate Array 3")||Read||Write
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|-
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|#7FXX||%0xxxxx11 xxxxxxxx||Aleste RAM Mapper page 3 (extended "Gate Array 3")||Read||Write
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|-
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|#7FXX||%0xxxxxxx xxxxxxxx||Aleste Multiport (customized [[Gate Array]])||-||Write
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|-
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|#BCXX||%x0xxxx00 xxxxxxxx||6845 [[CRTC]] Index|| - ||Write
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|-
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|#BDXX||%x0xxxx01 xxxxxxxx||6845 [[CRTC]] Data Out|| - ||Write
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|-
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|#BEXX||%x0xxxx10 xxxxxxxx||6845 [[CRTC]] Status (as far as supported)||Read|| -
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|-
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|#BFXX||%x0xxxx11 xxxxxxxx||6845 [[CRTC]] Data In (as far as supported)||Read|| -
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|-
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|#DFXX||%xx0xxxxx xxxxxxxx||[[Upper ROM Bank Number]] (bank 3 = Aleste Bootmenu)|| - ||Write
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|-
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|#EEXX||%xxx0xxx0 xxxxxxxx||Aleste USART 8251 (RS232/Mouse) Data|| ? ||Write
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|-
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|#EFXX||%xxx0xxx1 xxxxxxxx||Aleste USART 8251 (RS232/Mouse) Control|| ? ||Write
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|-
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|#F4XX||%xxxx0x00 xxxxxxxx||[[8255]] PIO Port A (PSG/8253 Timer/Real-Time Clock data)||Read||Write
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|-
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|#F5XX||%xxxx0x01 xxxxxxxx||[[8255]] PIO Port B (Vsync,[[Printer Port|PrnBusy]],Tape,etc.)||Read|| -
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|-
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|#F6XX||%xxxx0x10 xxxxxxxx||[[8255]] PIO Port C (KeybRow, Real-Time-Clock control,Tape,[[PSG]] Control)|| - ||Write
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|-
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|#F7XX||%xxxx0x11 xxxxxxxx||[[8255]] PIO Control-Register|| - ||Write
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|-
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|#FA7E||%xxxxx0x0 0xxxxxxx||Floppy Motor Control (for [[765 FDC]])|| - ||Write
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|-
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|#FABF||%xxxxx0x0 10xxxxxx||Aleste EXTPORT|| - ||Write
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|-
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|#FB7E||%xxxxx0x1 0xxxxxx0||[[765 FDC]] (internal) Status Register||Read|| -
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|-
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|#FB7F||%xxxxx0x1 0xxxxxx1||[[765 FDC]] (internal) Data Register||Read||Write
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|}
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== Ext Port ==
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{|{{Prettytable|width: 700px; font-size: 2em;}}
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|''bit''||Action
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|-
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|7||not used
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|-
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|6||not used
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|-
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|5||if 0, then AY is accessed when read/write to 8255 port A, if 1 then real-time clock is accessed with read/write to 8255 port A. When real-time clock is selected, bits 2..0 of PPI port C are used to define real-time clock operation. DS bit 2, AS bit 1, R/W bit 0. So combinations are 2, write address, 4 write data, 5 read data.
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|-
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|4||Enable 8253 timer. Any I/O write then accesses 8253 with data comming from 8255 port A. Bit A0/A1 of I/O port defines 8253 register
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|-
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|3||force video to black
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|-
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|2||MAPMOD
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* When MAPMOD=0: Uses CPC-style 27-color palette, and CPC6128-style RAM banking
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* When MAPMOD=1: Uses special 64-color palette, and extended RAM mapper
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|-
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|1||Enables high resolution in X. Also changes some clock frequences. Controls decoding of video address.
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|-
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|0||Not fully understood yet. Controls decoding of video address
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|}
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== Aleste Gate Array (aka Patasonic's Multiport) ==
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Aleste "Gate Array" is similar in functionality to the Gate-Array in the CPC/Plus.
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{|{{Prettytable|width: 700px; font-size: 2em;}}
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|''bit 7''||''bit 6''||Action
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|-
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|0||0||Gate Array Register 0 - Pen index write
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|-
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|0||1||Gate Array Register 1 - Pen ink write
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|-
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|1||0||Gate Array Register 2 - Mode, Rom enable, Leds
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|-
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|1||1||Gate Array Register 3 - Used by mapper
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|-
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|}
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=== Gate Array Register 0 ===
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Pen index:
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{|{{Prettytable|width: 700px; font-size: 2em;}}
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|''bit''||Action
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|-
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|7||0
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|-
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|6||0
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|-
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|5||not used
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|-
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|4||If set to 1, border is selected
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|-
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|3..0||Pen index
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|}
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=== Gate Array Register 1 ===
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The number is converted by IC D62.
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* When MAPPER is set in EXTPORT, then the numbers effectively define a R,G,B colour with 2 bits per element, but the rom then changes the order of the bits before it gets to the hardware.
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* When MAPPER is not set, the number is equivalent to the CPC's Gate-Array colour value, but this is looked up in IC D62 and converted into a 2-bit per element R,G,B for the aleste video hardware.
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=== Gate Array Register 2 ===
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{|{{Prettytable|width: 700px; font-size: 2em;}}
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|''bit''||Action
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|-
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|7||0
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|-
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|6||1
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|-
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|5||CAPS LED
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|-
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|4||RUS LED
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|-
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|3||Upper rom enable/disable
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|-
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|2||Lower rom enable/disable
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|-
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|1..0||Mode
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|}
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bit 0,1 define the mode. The actual resolution is then dependant on bit 1 of EXTPORT.
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When HIGHTX is 0, CPC modes are chosen. When HIGHTX is 1, Aleste modes are chosen.
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CPC modes:
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{|{{Prettytable|width: 700px; font-size: 2em;}}
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|''bit 1''||''bit 0''||Mode
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|-
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|0||0||160x200 (16 colours)
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|-
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|0||1||320x200 (4 colours)
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|-
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|1||0||640x200 (2 colours)
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|-
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|1||1||Don't know. On CPC this is 160x200 (4 colours)
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|-
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|}
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Aleste modes:
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{|{{Prettytable|width: 700px; font-size: 2em;}}
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|''bit 1''||''bit 0''||Mode
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|-
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|0||0||Don't know
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|-
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|0||1||Don't know
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|-
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|1||0||Don't know
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|-
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|1||1||Seems to be 320x200 (16 colours)
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|-
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|}
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=== Gate Array Register 3 (in CPC-style MAPMOD=0) ===
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+
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Controls RAM Banking, similar to the Gate Array on CPC6128 (or, more specific, similar to the 16L8 PAL IC which assists the CPC6128s Gate Array).
+
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+
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In the Aleste register 3 is effectively Mapper select.
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Writing to port #7Fxx with bit 7 and bit 6 of data set to 1 can be used to set page 3 RAM bank in Aleste mapper mode, or to define CPC RAM configuration in CPC mode.
+
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+
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'''Actually''', it seems to work more like an [[Inicron RAM-Box]] (which isn't fully compatible with the dk'tronics style [[Standard Memory Expansions]]).
+
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+
−
=== Gate Array Register 3 (in Aleste's special MAPMOD=1) ===
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−
 
+
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Four I/O ports control the mapper:
+
−
{|{{Prettytable|width: 700px; font-size: 2em;}}
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−
|'''I/O'''||'''Decoded as'''||'''Page'''||'''Memory region'''
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|-
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−
|#7CXX||%0xxxxx00 xxxxxxxx||page 0||&0000-&3fff
+
−
|-
+
−
|#7DXX||%0xxxxx01 xxxxxxxx||page 1||&4000-&7fff
+
−
|-
+
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|#7EXX||%0xxxxx10 xxxxxxxx||page 2||&8000-&bfff
+
−
|-
+
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|#7FXX||%0xxxxx11 xxxxxxxx||page 3||&c000-&ffff
+
−
|}
+
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+
−
The decoding of the I/O port for the mapper uses bit 15 of the I/O address in the same way as the Aleste "Gate Array".
+
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Bit 9,8 define which page.
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+
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To avoid writing to the Aleste "Gate-Array" bits 7 and 6 of the data must be 1.
+
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+
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The remaining bits define the RAM block/configuration to use.
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+
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In CPC mode, writing to the mapper changes the RAM configuration for all pages, with the memory configuration being the same as a DK'Tronics compatible RAM.
+
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+
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In Aleste mapper mode, writing to the mapper changes the RAM for one page.
+
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+
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It is not know:
+
−
* Must you write to #7Fxx in CPC mode to define RAM configuration or can you also use #7Cxx, #7Dxx, #7Exx for same effect
+
−
* When you write CPC RAM configuration is it mirrored in all mapper registers?
+
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+
−
== Upper ROM Bank ==
+
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+
−
Works like the [[Upper ROM Bank Number]] on CPCs. The banks used for the Aleste BIOS are:
+
−
  00h BASIC    (bytes in 4000h..7FFFh in the Aleste's 64K EPROM)
+
−
  03h BOOTMENU (bytes in C000h..FFFFh in the Aleste's 64K EPROM)
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  07h AMSDOS  (bytes in 8000h..BFFFh in the Aleste's 64K EPROM)
+
−
All other values 01h..02h, 04h..06h, 08h..FFh do select BASIC, too.
+
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+
−
== PPI 8255 ==
+
−
 
+
−
Works similar to the [[8255]] in the CPC (see there for details). Differences are listed below.
+
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+
−
=== PPI Port A (Port F4xxh) ===
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+
−
{|{{Prettytable|width: 700px; font-size: 2em;}}
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−
|''Bit''||''Description''||''Usage in CPC''||''Usage in Aleste''
+
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|-
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|7-0||PSG.DATA||[[PSG]] Databus (Sound/Keyboard/Joystick)||[[PSG]] Databus (Sound/Keyboard/Joystick/Printer), and Baudrate/Future Timer databus, and RTC databus)
+
−
|-
+
−
|}
+
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+
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=== PPI Port B (Port F5xxh) ===
+
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+
−
{|{{Prettytable|width: 700px; font-size: 2em;}}
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−
|''Bit''||''Description''||''Usage in CPC''||''Usage in Aleste''
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|-
+
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|7||CAS.IN||Cassette data input||Same as on CPC
+
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|-
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|6||PRN.BUSY||Parallel/Printer port ready signal, "1" = not ready, "0" = Ready||Same as on CPC
+
−
|-
+
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|5||/EXP||Expansion Port /EXP pin||Wired to GND (uh, BUT, Aleste Expansion Port DOES have an /EXP pin?)
+
−
|-
+
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|4||LK4||Screen Refresh Rate ("1"=50Hz, "0"=60Hz)||Same as in CPC
+
−
|-
+
−
|3||LK3||Manufacturer ID bit3||rowspan=2|LK3 is shortcut to LK2, and wired to a pull-up resistor
+
−
|-
+
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|2||LK2||Manufacturer ID bit2
+
−
|-
+
−
|1||LK1||Manufacturer ID bit1||/DISCINT (the /INT pin from FDC 765)
+
−
|-
+
−
|0||[[CRTC]] VSYNC||Vertical Sync ("1"=VSYNC active, "0"=VSYNC inactive)||Same as on CPC (though using emulated timings from VDKEY eprom)
+
−
|-
+
−
|}
+
−
 
+
−
=== PPI Port C (Port F6xxh) ===
+
−
 
+
−
{|{{Prettytable|width: 700px; font-size: 2em;}}
+
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|''Bit''||''Description''||''Usage in CPC''||''Usage in Aleste''
+
−
|-
+
−
|7||PSG BDIR||rowspan=2|PSG function selection||rowspan=2|Same as in CPC
+
−
|-
+
−
|6||PSG BC1
+
−
|-
+
−
|5||Cassette Write data||Cassette Out (and Printer Bit7, see [[8bit Printer Ports]])||Cassette Out
+
−
|-
+
−
|4||Cassette Motor Control||Cassette Motor (0=Off, 1=On)||Printer Strobe (0=High, 1=Low)
+
−
|-
+
−
|3||rowspan=4|Keyboard row||rowspan=4|10 rows (0..9)||rowspan=4|11 rows (0..10), and also used for RTC control signals
+
−
|-
+
−
|2
+
−
|-
+
−
|1
+
−
|-
+
−
|0
+
−
|-
+
−
|}
+
−
 
+
−
=== PPI Control (Port F7xxh) ===
+
−
 
+
−
This register has two different functions depending on bit7 of the data written to this register.
+
−
 
+
−
See the normal CPCs [[8255]] description for details.
+
−
 
+
−
== Keyboard ==
+
−
 
+
−
The Aleste uses a MSX keyboard, as seen by the characteristic five function keys. The mainboard contains some excessive TTL logic, assisted by the upper data bits of the VDKEY eprom, that translates the MSX matrix to a CPC matrix.
+
−
 
+
−
So, at I/O port level, the CPU "sees" a CPC matrix, not a MSX matrix. When running MSXDOS, this leads to the funny situation that MSXDOS must undo the hardware MSX-to-CPC translation by some software CPC-to-MSX translation.
+
−
 
+
−
The keyboard has some additional keys, which aren't on normal CPC keyboards:
+
−
* '''F1/F6, F2/F7, F3/F8, F4/F9, F5/F10''' - MSX-style function keys, mapped to keyboard row 10, bits 7,6,5,4,3.
+
−
* '''HELP, INS, b''' - additional keys, mapped to keyboard row 10, bits 2,1,0.
+
−
* '''R/L''' - Russian/Latin mode, mapped to keyboard row 9, bit6 (aka joystick Fire3).
+
−
* '''RES''' - Reset button, goes to /RESET signal.
+
−
* '''Four unknown keys''' - These keys (above the numeric keypad) may be unused, or having same function as other keys?
+
−
 
+
−
The Aleste has a JCUKEN keyboard, rather than a QWERTY keyboard.
+
−
* '''Unknown''' if this done by hardware, or by patched CPC bios (?)
+
−
* Normally, the key next to TAB '''should''' be Row8.Bit3 in the CPC matrix. And the BIOS should assign "Q" to it for english QWERTY keyboards, "A" for french "AZERTY" keyboards - or "J" for russian JCUKEN keyboards (though not sure if Patisonic has implemented it that way).
+
−
 
+
−
  _____ _____ _____ _____ _____                _____ _____ _____  _____ _____
+
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|F1/6 |F2/7 |F3/8 |F4/9 |F5/10|              |HELP |INS  | DEL | |N/A  | RES |
+
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|_____|_____|_____|_____|_____|              |_____|_____|_____| |_____|_____|
+
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  _____ ___ ___ ___ ___ ___ ___ ___ ___ ___ ___ ___ ___ ___ _____  ___ ___ ___
+
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| ESC | ; | 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 | 9 | 0 | _ | b |  BS | |N/A|N/A|N/A|
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|_____|___|___|___|___|___|___|___|___|___|___|___|___|___|_____| |___|___|___|
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|  TAB  | J | C | U | K | E | N | G | { | } | Z | H | : | / |  | | F7| F8| F9|
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|_______|___|___|___|___|___|___|___|___|___|___|___|___|___|  | |___|___|___|
+
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|  CTRL  | F | Y | W | A | P | R | O | L | D | V | \ | . |RETURN| | F4| F5| F6|
+
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|________|___|___|___|___|___|___|___|___|___|___|___|___|______| |___|___|___|
+
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|CAPS| R/L | Q | | | S | M | I | T | X | B | @ | '  |  | U |  | | F1| F2| F3|
+
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|____|_____|___|___|___|___|___|___|___|___|___|____| L |___| R | |___|___|___|
+
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|  SHIFT | COPY|        SPACE              | SHIFT |  | D |  | | F0| F.|ENT|
+
−
|________|_____|____________________________|_______|___|___|___| |___|___|___|
+
−
 
+
−
== Aleste 8bit Printer Port ==
+
−
 
+
−
* Printer data-bits are connected to AY I/O port B (PSG register 15).
+
−
* Printer strobe is connected to PPI 8255 port C bit 4. The strobe is negated by the hardware.
+
−
* Printer busy is connected to PPI 8255 port B bit 6.
+
−
* All of the above PPI and PSG registers are bi-directional.
+
−
 
+
−
This is different as that in the CPC (the CPCs [[Printer Port]] uses Port EFXXh for one-directional 7bit data plus strobe).
+
−
 
+
−
== Joystick ==
+
−
 
+
−
The Aleste has a 7pin joystick connector. Aside from the different pin-outs, it's the same as the normal 9pin connector on CPCs. Except that:
+
−
* There's no COM2 signal (no way to attach an Y-cable for 2nd joystick to the connector)
+
−
* There's no FIRE3 signal (which is undocumented, rarely used pin on CPC) (NB. The Aleste uses FIRE3 as R/L key on the keyboard).
+
−
 
+
−
== Mouse ==
+
−
 
+
−
The built-in RS232 port can be used to connect a serial mouse.
+
−
* See [[Serial RS232 Mouse]] for details on the protocol
+
−
 
+
−
== Translation PROMs and EPROMs ==
+
−
 
+
 
* [[Aleste Translation PROMs and EPROMs]] - description of the numbers in the look-up PROMs/EPROMs
 
* [[Aleste Translation PROMs and EPROMs]] - description of the numbers in the look-up PROMs/EPROMs
−
 
+
* [[Media:Aleste Interview Deepfb Valeriy.h t m l]] - Interview with one of the Aleste developers (to view the file: repair the extension, and/or insert HTML and /HTML tags - for some reason, cpcwiki doesn't support the html format)
−
== Technical specs ==
+
−
 
+
−
* CPU: Z80
+
−
* Clock: 4Mhz (CPC mode derived from a 16Mhz crystal), 3.2Mhz (Aleste mode derived from a 13Mhz crystal)
+
−
*  Memory manager: Dk'Tronics compatible memory mapper (CPC mode), msx-mapper (Aleste mode)
+
−
* Memory: 512КБ (up to 2МБ)
+
−
* Audio: AY8910
+
−
* Graphics:
+
−
** 256x212:16 colors
+
−
** 512x212:4 colors
+
−
** 320x200:16 colirs
+
−
** 640x200:4 colors
+
−
** 640x400:4 colors interleaved
+
−
** Palette 64 colors
+
−
** Hardware scroll (standard CRTC hardware scroll)
+
−
* Floppy disk 3.5"
+
−
* Mouse
+
−
* RTC (mc146818 compatible)
+
−
* Expansion slot
+
−
** 19 address lines
+
−
** DMA to whole memory
+
−
** External board MagicSound
+
−
*** 4 channels
+
−
*** 8 bits per channel
+
−
*** Stereo output
+
−
* Touch screen (only prototype)
+
−
* Light-Processor with D54
+
−
 
+
−
== Software ==
+
−
* MSXDOS
+
−
* С compiler
+
−
* GUI Debugger
+
−
* GameBIOS with VDP emulator
+
−
* Text editor PowerEdit
+
−
* Text files converter TRC. Convert between  MSX, Aleste, and DOS
+
−
* Disk Fixer (ported)
+
−
* Disk Edit (ported)
+
−
* Image viewer
+
−
* Player of S3M, STM files
+
−
* Editor of S3M, STM files
+
−
* Games ported from MSX2
+
−
** VampireKiller
+
−
** KingValery 2
+
−
** FireBird
+
−
** MetalGear
+
−
 
+
−
== Aleste Chipset ==
+
−
 
+
−
=== Main Chipset ===
+
−
 
+
−
pcs russian    western  description    location
+
−
  1  Z80A CPU  Z80A    CPU            (D30=sheet2)
+
−
  1  UM6845    6845    CRTC          (D25=sheet2)
+
−
  1  AY-3-8910  AY3-8910 PSG, Dual I/O  (D18=sheet2) (with TWO I/O ports, unlike as in CPC)
+
−
  4  KR1802IR1  ?        RAM 16x4      (D60,D61=sheet2=palette, D62,D63=sheet4=keyboard)
+
−
  1  KR1810WG72 uPD765  FDC            (D70=sheet3)
+
−
  1  KR580WI53  8253    baudrate timer (D33=sheet4) (/CS=/CS53, A0,A1=A0,A1, D0-D7=AY0-AY7=PPIpa) (/WR only, no /RD) (CLK0,CLK1=WGPTCLK=16MHz/n, see sheet3)
+
−
  1  KR580WW51A 8251(A?) usart/mouse    (D34=sheet2) (A12=/CS, A8=C/D)
+
−
  1  KR580WW55A 8255    PPI            (D17=sheet2)
+
−
  1  KR512WI1  MC146818 RTC            (D19=sheet2)
+
−
  16 K565RU7K  HM50256  DRAM 256Kx1    (D1..D16=sheet3) (512Kbyte)
+
−
  1  K573RF4    27512    EPROM 64Kx8    (D31=sheet2) (BIOS/BASIC/BOOT/AMSDOS)
+
−
  2  K573RF2    2764    EPROM 2Kx8    (D62=COLDAT=sheet1, D65=VDKEY=sheet1)
+
−
  1  K155RE3    27S18    PROM 32x8 OC  (D69="Af"=sheet3=floppy) (dummy FP0..FP3, disk /GATE, to D72 count --> DW --> FDC)
+
−
  2  (KR)556RT4 27S20    PROM 256x4 OC  (D28="M"=MAP14..MAP17=sheet2, D67="R"=ROMEN/RAMEN etc.=sheet1)
+
−
 
+
−
=== Further Chips ===
+
−
pcs russian    western  description              location
+
−
  1  K170AP2    SN75150  rs232 dual line driver  (D86=sheet4)
+
−
  1  K555AP6    74LS245  8bit 3state tranceiver  (D89=sheet3)
+
−
  2  K555ID4    74LS155  2x2bit decoder/demult    (D54=sheet1, D74=sheet3)
+
−
  1  K555ID10  74LS145  bcd demultiplexer        (D80=sheet4)
+
−
  1  K555IE5    74LS93  4bit (1bit+3bit) counter (D72=sheet3)
+
−
  1  K555IE10  74LS161  4bit counter            (D37=sheet1)
+
−
  4  K555IR11A  74LS194  4bit shift register      (D39,D49=sheet1, D50,D51=sheet2)
+
−
  4  K555IR22  74LS373  8bit 3state latch        (D45,D46,D47,D48=sheet1) (RAM 16bit-to-8bit cpu/vram bus)
+
−
  2  K555IR23  74LS374  8bit 3state flipflop    (D58=sheet3, D84=sheet4)
+
−
  2  K555IR32  74LS170  4x4bit register file OC  (D87,D88=sheet2)
+
−
  6  K555KP2    74LS153  2x 4vstup. multiplexer  (D20,D21,D22,D23,D52,D53=sheet2)
+
−
  2  K555KP7    74LS151  8bit multiplexer        (D24=sheet2,D81=sheet4)
+
−
  1  K555KP11  74LS257  8-to-4 data selector    (D38=sheet1) (clock select)
+
−
  1  K555KP12  74LS253  2x 4vstup. multiplexer, TS "8-to-2 line 3-state noninverting data selector/multiplexer" (D26=sheet3)
+
−
  .. K555LA3    74LS00  Quad NAND gates          (various)
+
−
  .. K555LE1    74LS02  Quad NOR gates          (various)
+
−
  .. K555LI1    74LS08  Quad AND gates          (various)
+
−
  .. K555LL1    74LS32  Quad OR gates            (various)
+
−
  .. K555LN1    74LS04  Hex inverters            (various)
+
−
  1  K555LN2    74LS05  Hex inverters, OC        (D76=sheet3)
+
−
  5  K555TM2    74LS74  Dual flipflop            (D40,D77,D66,D57=sheet1, D71=sheet3)
+
−
  6  K555TM9    74LS174  6bit flipflop            (D32,D55,D56=sheet1, D59=sheet2, D68=sheet3, D79=sheet4)
+
−
  1  K561IE10  MC14520B dual up binary counter  (D63,D64=sheet1)
+
−
 
+
−
=== Chipset Notes ===
+
−
 
+
−
* The part numbers printed on the chips may look like "KPxxx" (cyrillic) instead of "KRxxx" (latin).
+
−
* As mentioned at chipdir, KR1802IR1 is similar to AM29705, but '''NOT''' the same (the AM29705 has four additional data pins).
+
  
 
== Weblinks ==
 
== Weblinks ==
  
 
* http://aleste520.narod.ru - site dedicated to aleste (mainly english, plus some russian docs)
 
* http://aleste520.narod.ru - site dedicated to aleste (mainly english, plus some russian docs)
 +
* [https://github.com/LasDesu/Aleste-520EX github.com/LasDesu/Aleste-520EX] - schematics, PCBs, ROMs and docs
  
−
[[Category:Hardware]]
+
[[Category:Hardware]][[Category:Non CPC Computers]][[Category:Clones]]

Latest revision as of 12:50, 1 December 2020

Aleste 520EX - a CPC clone housed in a case with MSX keyboard

The Aleste 520EX is a clone of the Amstrad CPC 6128 developed 1993 by Patisonic in Omsk (Siberia). The Aleste is rare, according to Patisonic themselves, they "produced several dozens of the model, some of them were in 'kit' form".

In addition to the standard CPC6128 features, it includes a number of extra features: 64-color palette, double color depth in slightly decreased horizontal resolution mode (eg. 16 color at 256x200 resolution), battery-backed Real Time Clock chip, 512Kbyte RAM (of which 192K can be accessed as on 64K CPC with 128K dk'tronics memory expansion), 8bit printer port, expanded keyboard matrix with 10 additional keys, two software controlled LEDs, extended Expansion Port (with additional pins for DMA support).

Technical

Pictures

  • Aleste 520EX

  • PCB Top

  • PCB Bottom

  • Keyboard

  • Pictures from http://aleste520.narod.ru

  • PCB and Keyboard

  • PCB top (component side)

  • PCB bottom (solder side)

  • PCB illustrated

The above photos are showing a more or less fully assembled Aleste (the LEDs are missing, and, more important, there is no connection for an internal or external power supply attached to the mainboard - unless the owner used the Expansion Port connector to inject power supply voltages).

  • Pictures from http://www.zonadepruebas.com

  • PCB and Keyboard

  • PCB only

  • Rear-connectors

  • Bottom

This version has 7pin+7pin sockets for printer (normal would be 5pin+7pin, though the extra pins are most probably left unused).

  • Magic Sound board

  • PCB Top

  • PCB Bottom

A sound card for the Aleste.

Documents

Weblinks

Retrieved from "https://gryzor.info/index.php?title=Aleste_520EX&oldid=107475"