Changes

The function to be performed is selected by writing data to the Gate Array, the first bits of the data define the function selected (see table below). It is not possible to read from the Gate Array.

!colspan=4| 8bit command

!rowspan=2| Machine

==== Summary ====

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| 7 || 0 || rowspan="2" | Gate Array PENR register

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| 7 || 0 || rowspan="2" | Gate Array PENR register

==== Summary ====

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| 7 || 0 || rowspan="2" | Gate Array INKR register

The function of bits 1 and 0 is to define the screen mode. The settings for bits 1 and 0 and the corresponding screen mode are given in the table below.

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| 0 || 0 || Mode 0, 160x200 resolution, 16 colours

==== Summary ====

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| 7 || 1 || rowspan="2" | Gate Array RMR register

This register exists only in Plus or GX4000, and is only accessible when the ASIC is unlocked.

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| 7 || 1 || rowspan="3" | Gate Array RMR2 register

This register exists only in CPCs with 128K RAM (like the CPC 6128, or CPCs with [[Standard Memory Expansions]]). Note: In the CPC 6128, the register is a separate [[PAL16L8|PAL chip]] that assists the Gate Array chip. See its wiki page.

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| 7 || 1 || rowspan="2" | Gate Array MMR register

== Video memory structure ==

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