For example, if CRTC R2=46, and CRTC HSYNC width is 14 then monitor hsync starts at 48 and lasts only until 51 included.
The VSYNC is also modified before being sent to the monitor. It happens two lines* after the VSYNC from the CRTC and stay two lines (same cut rule if VSYNC is lower than 4). PAL (50Hz) does need two lines VSYNC_width, and 4us 4µs HSYNC_width.
The Gate Array uses 2 internal counters to create its CSYNC signal: