Changes

The DISPTMG can be forced to 0 by using R8 (DISPTMG Skew) on type CRTCs 0,/3 and /4 or by setting R6=0 on type CRTC 1. It is not possible to force the DISPTMG on type CRTC 2.

== The 6845 Registers CRTC registers ==

On CRTCs 0/2, registers 18-31 read as 0, on type 0 and 2. On CRTC 1, registers 18-30 read as 0 on type1, register 31 reads as 0xff.

== CRTC Differences register differences == In this section I will attempt to identify all the differences between each CRTC.

=== R31 on Type 1 Vertical Displayed (R6) ===

R31 On CRTCs 0/1/2, the condition VCC=R6 is considered immediately to activate the VBORDER. The only exception is described in for CRTC 1 with a value of 0, which triggers an immediate BORDER without the UM6845R documentation as "Dummy Register"condition VCC=R6 being required.

Its use is described in the documentation for the Rockwell R6545 in combination with R18On CRTCs 3/4, R19 and R8 and the Status Registercondition VCC=R6 is tested only at new character line start. In The update of R6 during the UM6845R it appears to have no effect. Reading and writing does nothing. Reading it returns 0x0ff. R31 doesn't exist on types 0,2,3,4character line is therefore not considered.

=== R12/R13 R31 on Type 1 ===

The UM6845R differs to other CRTC R31 is described in respect of R12/R13the UM6845R documentation as "Dummy Register".

When VCC=0, R12/R13 Its use is re-read at described in the start of each line. R12/R13 can therefore be changed documentation for each scanline when VCC=0the Rockwell R6545 in combination with R18, R19 and R8 and the Status Register.

Just like other CRTCs when RC==(R9-1), In the current MA is captured for the next char-lineUM6845R it appears to have no effect. Reading and writing does nothing. Reading it returns 0x0ff.

In demos to make a display compatible with all R31 doesn't exist on CRTCs, program R12/R13 when VCC!=0. This will then take effect at the next frame start/2/3/4.

The cursor raster registers R10/R11 act as status registers when read on Types CRTCs 3 & /4. They behave as normal cursor raster registers upon write.

On CRTC Types CRTCs 3 and /4, only the 3 least significant bits of the selected register number are considered to read a register according to the following table:

The only value that is saved in a buffer in the CRTC is the video pointer MA because it is reloaded at each raster line start.  R12/R13 is loaded only once per frame, in MA and MA', at the first raster line start of the frame. The counter MA is then reloaded with the value of MA' at each raster line start. And at each new character line start, MA' captures the current value of MA. The exception is the CRTC 1 for which the MA is reloaded at each raster line start with R12/R13 instead of MA' as long as C4VCC=0. This is a major source of incompatibility if the programmer does not take care of this discrepancy. In demos and games, to make a display compatible with all CRTCs, program R12/R13 when VCC!=0. This will then take effect at the next frame start.

== Hitachi CRTC counter differences == === VSC (C3h) overflow === During a VSYNC on CRTCs 0/3/4, if VSYNC Width (R3h) is changed with a value less than the current VSC, then VSC overflows and will continue to count up to its maximum value (15) before looping back and counting up again until it reaches the new value of R3h. On CRTCs 1/2, the VSYNC width is fixed to 16 characters. It is not possible to modify it. Therefore, VSC cannot be overflowed. <br> === HSC (C3l) overflow === During an HSYNC, if HSYNC Width (R3l) is changed with a value less than the current HSC, then HSC overflows and will continue to count up to its maximum value (15) before looping back and counting up again until it reaches the new value of R3l. The only exception is for CRTC 1 with a value of 0, which immediately cancels the current HSYNC. <br> === VCC (C4) overflow === On all CRTCs, if Vertical Total (R4) is changed with a value less than VCC, then:* if this update was done when VCC < R4, then VCC overflows and will continue to count up to its maximum value (127) before looping back and counting up again until it reaches the new value of R4* if this update was done when VCC = R4, the current character line was already decided to be the last one of the current frame. No update to R4 will make the CRTC change its mind for the current frame The only exception when VCC = R4 is for CRTC 1 with a value of 0, which will cause VCC to overflow. <br> === HCC (C0) overflow === If Horizontal Total (R0) is changed with a value less than the current HCC, then:* on CRTCs 0/1/2, HCC overflows and will count up to its maximum value (255) before looping back and counting up again until it reaches the new value of R0* on CRTCs 3/4, the current line is considered finished and HCC is immediately reset to 0 on the next line <br> === VLC (C9) overflow === If Number of Scan Lines (R9) is changed with a value less than the current VLC, then:* on CRTCs 0/1/2, VLC overflows and will count up to its maximum value (31) before looping back and counting up again until it reaches the new value of R9* on CRTCs 3/4, the current line is considered the last one of this CRTC character and VLC will reset to 0 on the next line <br> === VTAC (C5/C9) overflow === During vertical adjustment mode, if Vertical Total Adjust (R5) is changed with a value less than the current VTAC, then:* on CRTCs 0/1/2, VTAC overflows and will continue to count up to its maximum value (31) before looping back and counting up again until it reaches the new value of R5* on CRTCs 3/4, the current line is considered the last one of the current frame and vertical adjustment will end <br> === Vertical Adjustment mode === On CRTCs 0/1/2, this mode increments VCC and so VCC goes beyond R4. On CRTCs 3/4, this mode does not increment VCC and so VCC stays equal to R4. <br> == Block Diagram Diagrams == === Hitachi === 

=== UMC Block Diagram ===

=== Motorola Block Diagram ===