b6 WP Write Protected (write protected)
b7 FT Fault (if supported: 1=Drive failure)
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== C, H, R, N values at result phase ==
If the processor terminates a read (or write) operation in the FDC, then the ID information in the result phase is dependent upon the state of the MT bit and EOT byte:
{| class="wikitable"
|-
! rowspan="2" | MT !! rowspan="2" | HD !! rowspan="2" | Final Sector Transferred to Processor !! colspan="4" style="text-align: center;" | ID Information at Result Phase
|-
! C !! H !! R !! N
|-
| 0 || 0 || style="text-align: center;" | Less than EOT || - || - || R + 1 || -
|-
| 0 || 0 || style="text-align: center;" | Equal to EOT || C + 1 || - || 0 || -
|-
| 0 || 1 || style="text-align: center;" | Less than EOT || - || - || R + 1 || -
|-
| 0 || 1 || style="text-align: center;" | Equal to EOT || C + 1 || - || 0 || -
|-
| 1 || 0 || style="text-align: center;" | Less than EOT || - || - || R + 1 || -
|-
| 1 || 0 || style="text-align: center;" | Equal to EOT || - || LSB || 0 || -
|-
| 1 || 1 || style="text-align: center;" | Less than EOT || - || - || R + 1 || -
|-
| 1 || 1 || style="text-align: center;" | Equal to EOT || C + 1 || LSB || 0 || -
|}
* An empty cell means it is the same value as the one at the beginning of command execution
* LSB (Least Significant Bit): The least significant bit of H is complemented
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