Changes

ASIC

1,375 bytes added, Friday at 06:36
*Specific ROM switching
*8-bit printer port (with bit3 of CRTC register 12)
 
== DMA commands ==
 
The available commands are :
 
{| class="wikitable"
|-
! Code
! Mnemonic
! Description
|-
| 0RDDh
| LOAD R,D
| Load 8 bit data D to PSG register R (0 < R ≤ 15)
|-
| 1NNNh
| PAUSE N
| Pause for N prescaled ticks (0 < N ≤ 4095)
|-
| 2NNNh
| REPEAT N
| Set loop counter to N for this stream (0 < N ≤ 4095) and mark next instruction as loop start
|-
| 3xxxh
| (reserved)
| Do not use
|-
| 4000h
| NOP
| No operation (64us idle)
|-
| 4001h
| LOOP
| If loop counter non zero, loop back to the first instruction after REPEAT instruction and decrement loop counter
|-
| 4010h
| INT
| Interrupt the CPU
|-
| 4020h
| STOP
| Stop processing the sound list
|}
 
Note that :
 
* REPEAT Loops cannot be nested . Only one is allowed to be active per instruction stream at any time.
* REPEAT 0 and PAUSE 0 instructions have no effect, i.e. they are equivalent to NOP.
* Control group (4xxxh) instructions can be logically ORed to produce more complex instructions, e.g. INT|STOP = 4030h = Interrupt and stop.
* The STOP instruction will leave the source address register pointing to the next instruction, so that the instruction stream can be continued after CPU intervention.
* The argument field (N) of the REPEAT instruction is actually the number of times the loop is taken. The block of code between REPEAT and LOOP instructions is therefore executed N+1 times.
== Known Flaws==
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