Changes
/* Clones */ link to the Verilog code
== Clones ==
* An ACID replacement using a Xilinx XC9536 CPLD and some [[Media:acid.vVerilog implementation of the ACID chip|Verilog Codecode]] based on nocash's reverse engineering work has been built by [[Octoate]] and [[Nilquader]].
* It's possible to use the CPC+ without ACID by exploiting a timing bug in the CPC+/GX4000-ASIC Chip.
<gallery caption="Running CPC+ without ACID">
