Changes
/* PAL Source Code */
CPU A15S AMUX MUX LCLK CAS1 CAS0 IOWR A14S VCC
IF (VCC) /LCLK= D7D6 * /A15 * /IOWR ;latch on OUT [7Fxxh],C0h..FFh
IF (VCC) /CAS0= /NCAS * /D4 + ;bank bit4=0, select bank 0..15 (CPU and CRTC)
/CAS0= /NCAS * A15 +
/CAS0= /NCAS * /A14 +
/CAS0= /NCAS * CPU
IF (VCC) /CAS1= /NCAS * D4 * /A15 * A14 * /CPU ;bank bit4=1, select bank 16..31 (CPU at 4000h..7FFFh only)
IF (VCC) /A14S= /A14 + ;bank bit0
/D0 * D2 * /A15 +
/D0 * D3 * /A15 +
/D0 * D4 * /A15
IF (VCC) /A15S= /A14 * /A15 + ;bank bit3
/D1 * /A15 +
/D4 * /D3 * /D2 * /D0 * /A15 +
A15 * A14 * D3 * /CPU * /MUX +
A15 * A14 * D4 * /CPU * /MUX +
/A15 * A14 * D2 * /CPU * /MUX + ;bank bit2 /A15 * A14 * D1 * /CPU * MUX ;bank bit1
IF (GND) /MUX = /MUX ;dummy (do not output anything on this pin)
IF (GND) /IOWR=/IOWR ;dummy (do not output anything on this pin)
== Newer Info ==
