Changes
/* CIO Registers */
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* '''Control Register 02h - Interrupt Vector Register Port A (R/W)'''* '''Control Register 03h - Interrupt Vector Register Port B (R/W)'''* '''Control Register 04h - Interrupt Vector Register Counter/Timers (R/W)'''
7-0 Interrupt Vector (Bit3-1 may be automatically modified, see below)
Port A/B: In Priority Encoded Vector Mode:
3-1 Number of highest Priority Bit with a match
3-1 Bit3-1=All zero if Error, or otherwise Bit3=ORE, Bit2=IRF, Bit1=PMF
Counter/Timer:
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* '''Control Register 1Fh - Current Vector Register (R)'''
7-0 Interrupt Vector Based on highest priority unmasked IP (IP=int pending)
If no interrupt pending then all 1's are output (ie. register is FFh)
