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Synchronising with the CRTC and display

67 bytes added, 06:47, 14 June 2008
The display is controlled by the [[CRTC ]] and the [[Gate-Array]].
The CRTC generates horizontal and vertical sync signals, and can be used to generate a variety of screen displays.
* Synchronising using the VSYNC
The [[VSYNC ]] signal of the CRTC is connected directly to [[PPI ]] port B, therefore it is possible to test the state of the VSYNC.
It is possible to synchronise to the start of the VSYNC using the following code: e.g.
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'''Note: ''' This code assumes that the VSYNC is not already active before the code is executed.
However, this will not be accurate enough:
Therefore, if we relied on VSYNC alone our effect would not be stable. For rasters this would mean they would "shake" which is useless for for split rasters.
== Synchronising using interrupts== 
The best method to synchronise is done by using interrupts for the following reasons:
=== on the CPC ===
 
the standard interrupt is generated by the Gate-Array using the HSYNC signal from the CRTC
 
=== on the CPC+ ===
on the CPC: the standard interrupt is generated by the Gate-Array using the HSYNC signal from the CRTC on the CPC+: all the interrupts are generated by the ASIC using the HSYNC signal from the CRTC.
Since the interrupts are based on the HSYNC signal from the CRTC, the position of the interrupt is directly related to the display cycle.
The time between the HSYNC and the interrupt request is always the same.
If interrupts will be acknowledge by the Z80, the time between interrupt request and the execution of the interrupt handler will be the same.
We do not need to monitor the state of a signal, therefore there will not be a variable time between detection and synchronisation as there is for synchronising with the start of the VSYNC.
 
On the CPC and KC Compact there is a single interrupt source.
On the CPC+ there are 3 interrupt sources (programmable raster interrupt, DMA channel 0, DMA channel 1 and DMA channel 2).
== Synchronisation in practice== 
In practice we use both methods of synchronisation.
The VSYNC is used as a reference point in a display cycle, therefore we use VSYNC synchronisation to get to this point. Then we use interrupts to perform exact synchronisation within the display cycle.
== Sychronising using interrupts on the CPC== 
On the CPC, we are limited to the standard interrupt. This is generated by the Gate-Array using HSYNCs from the CRTC. See the document about interrupt generation for furthur information.
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== Synchronising using interrupts on the CPC+== 
On the CPC+, with the ASIC special features enabled, we can use programmable raster interrupts, or DMA interrupts.
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