=== Illegal instructions ===
Opcodes in red are unstable. Only 2 of those 7 opcodes ($8B, $AB) are actually unstable in the sense that they may produce a truly unpredictable result. The other 5 opcodes actually produce predictable results – but the conditions under which they do that and the produced results are a bit unexpected.
{| class="wikitable" style="white-space: nowrap;"
|-
| ANE (XAA) || || style="color: #CC0000;"|'''8B''' (2) || || || || || || || || || N || - || - || - || - || Z || - || (A OR magic) AND X AND oper -> A || * AND X + AND oper
highly unstable: A base value in A is determined based on the contents of A and a constant. The value of this constant depends on temperature, the chip series, and maybe other factors, as well.
|-
| ARR || || 6B (2) || || || || || || || || || N || V || - || - || - || Z || C || A AND oper, C -> [76543210] -> C || AND oper + ROR
|-
| LXA (LAX) || || style="color: #CC0000;"|'''AB''' (2) || || || || || || || || || N || - || - || - || - || Z || - || (A OR magic) AND oper -> A -> X || Store * AND oper in A and X
Highly unstable: involves a 'magic' constant
|-
| NOP (DOP, TOP) || 1A, 3A, 5A,
| SBX (AXS, SAX) || || CB (2) || || || || || || || || || N || - || - || - || - || Z || C || (A AND X) - oper -> X || CMP and DEX at once, sets flags like CMP
|-
| SHA (AHX, AXA) || || || || || style="color: #CC0000;"|'''9F''' (5) || || || || || style="color: #CC0000;"|'''93''' (6) || - || - || - || - || - || - || - || A ∧ AND X ∧ V → AND (H+1) -> M || Store Accumulator "Stores A AND" Index Register X "AND" Value(high-byte of addr. + 1) at addrunstable: sometimes 'AND (H+1)' is dropped, page boundary crossings may not work (with the high-byte of the value used as the high-byte of the address)
|-
| SHS (TAS, XAS) || || || || || style="color: #CC0000;"|'''9B''' (5) || || || || || || - || - || - || - || - || - || - || A ∧ X → S, S ∧ (H + 1) → M || Transfer Accumulator "AND" Index Register X to Stack Pointer then Store Stack Pointer "AND" Hi-Byte In Memory