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/* Adressing Modes */
Fun fact: the TMS9900 CPU took this further, and had no onboard registers (other than PC & status register). Everything was in RAM.
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== Instruction Execution Sequence ==
For an instruction to fully execute, the 6502 goes through these key phases in order:
#Opcode Fetch
#Operand Fetch (if needed)
#Memory Read / I/O Read (if needed)
#Execution
#Memory Write / I/O Write (if needed)
#At the end of every instruction, the IRQ (if the interrupt disable flag is clear) and NMI pins are checked.
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