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Programming:Unlocking ASIC

41 bytes added, 5 January
</pre>
Note: As one may see, the nybbles in the sequence are based on two 4bit shift registers. For one reason or another, Amstrad has patented the verification mechanism ([[Media:Patent GB2243701A.pdf|GB2243701A]]). The patent seems to focus on ''verifying'' (rather than on ''sending'') the sequence, so its legal use is a bit unclear.
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ret
</pre>
 
==Visual representation==
 
As one may see, the nybbles in the sequence are based on two 4bit shift registers.
 
==Patent==
For one reason or another, Amstrad has patented the verification mechanism ([[Media:Patent GB2243701A.pdf|GB2243701A]]). The patent seems to focus on ''verifying'' (rather than on ''sending'') the sequence, so its legal use is a bit unclear.
[[Category:Programming]]
[[Category:CPC Plus]]
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