Changes
CRTC
,/* DISPTMG (aka Display Enable) */
DISPTMG can be immediately forced to 0 by using R8 (DISPTMG Skew) on CRTCs 0/3/4 or by setting R6=0 on CRTC 1. It is not possible to force DISPTMG on CRTC 2.
=== Interline border Border bytes ===
==== Interline border ====
On CRTCs 0/2, R1>R0 generates one byte (0.5µs) of border at the end of the raster line. On CRTCs 1/3/4, it does not.
=== Conflict resolution = Border conflict ====
If R1=0 and HCC=0, we expect HBORDER to activate as HCC=R1 and we also expect HBORDER to deactivate as HCC=0. In this situation, all CRTCs activate HBORDER.
If R6=0 and VCC=0, we expect VBORDER to activate as VCC=R6 and we also expect VBORDER to deactivate as VCC=0. In this situation, all CRTCs activate VBORDER. On CRTC 1, even IBORDER is activated. But on CRTCs 0/2, the first raster line shows an alternation of bytes of VBORDER and displayable characters.
==== Border byte precision Byte Precision ==== This behaviour exhibited by CRTCs 0/2 demonstrates shows that, despite their 1MHz clock speed, they can change their state at a rate equivalent to 2MHz chips. They are able to respond by responding to both the rising and falling edges of each clock cycle.
To see the border bytes with your own eyes, type this BASIC line after reset:
