On CPC, the The HSYNC and VSYNC signals from the CRTC are passed to the [[Gate Array]] for further modification. See its wiki page.
The HSYNC width value is interpreted differently between CRTCs. On CRTCs 0/1, if 0 is programmed no HSYNC is generated. On CRTCs 2/3/4, if 0 is programmed this gives a HSYNC width of 16.
