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ASIC

15 bytes added, 5 July
/* Programmable Raster Interrupt */
An 8-bit memory-mapped register (PRI) has been added within the ASIC at address 6800h, which is cleared at power up:
*When PRI=0, the classic R52 raster interrupt system of the [[Gate Array]] functions as before*Otherwise, we have a programmable raster line interrupt system instead: an interrupt will occur at the end of the scan line specified in PRI
The PRI can be reprogrammed as required to produce multiple interrupts per frame.
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