Changes

NOTE: This document describes the functionality in terms of the CPC with its separate CRTC and Gate-Array. The Plus has both integrated into the same IC, but could be considered to have two functional blocks, one for CRTC and one for Gate-Array. In this document the term 'Gate-Array' is used, but this also applies to the ASIC.

== Overview ==

4. As far as I know, the KC compact used HD6845R only.

== Timings and relating with Z80 instructions count ==

Some informations like : how many Z80 instructions can I fit within a scan line ? Within a screen ? Etc... See http://www.cpcwiki.eu/forum/programming/frame-flyback-and-interrupts/msg25106/#msg25106

(To be extracted/edited to conform to wiki good practices).

==Programming==

2. The CRTC is not connected to the CPU's RD and WR pins, so the CRTC is not aware of the CPU bus I/O direction. Therefore, if you perform an IN instruction to the select or write functions, it will write data to the CRTC from the current data on the bus.

==Addressing==

CRTC pins RA3, RA4, MA10, MA11 are not connected on CPC.

== CUDISP (aka CURSOR) ==

However, this signal is provided to the expansion port. And it is used by the [[PlayCity]] and [[Play2CPC]] expansions.

== DISPTMG (aka Display Enable) ==

The DISPTMG can be forced to 0 by using R8 (DISPTMG Skew) on type 0,3 and 4 or by setting R6=0 on type 1. It is not possible to force the DISPTMG on type 2.

== HSYNC and VSYNC ==

The bit 0 of port B of the PPI changes to 1 as soon as the VSYNC signal is produced by the CRTC.

== The 6845 Registers ==

So, it's possible to use 32KB screen size (used for [[Programming:Overscan|overscan]]) by setting bits 11 and 10 both to 1 (of Register 12). Bits MA11 and MA10 of the address generated by the CRTC are not written on the address bus to access video memory; settings both bits to 1 is the only way to cause a carry to bit MA12 when address pass over the end of current video page to change the memory address to the next video page.

== CRTC Differences ==